[LLVMdev] Floating-Point Constants in TableGen?

[Jakob Stoklund Olesen]

On Sep 28, 2011, at 6:58 PM, Justin Holewinski wrote:

> Is it possible to represent floating-point constants in TableGen definitions?

I don't think that is supported.

> Let's say I have the following pattern:
> 
> def : Pat<(i1 (trunc RegI16:$a)),      (SETPGTu16ri RegI16:$a, 0)>;
> 
> Note the zero constant in the result.  Is there a way to represent floating-point literals in the same way?  Something like...
> 
> def : Pat<(i1 (uint_to_fp RegF32:$a)),      (SETPGTf32ri RegF32:$a, (f32 0.0))>;
> 
> This unfortunately does not work.  Right now I'm getting around this by using alternate instructions to first convert from an integer immediate, something like:
> 
> def : Pat<(i1 (uint_to_fp RegF32:$a)),      (SETPGTf32ri RegF32:$a, (MOVf32i32 0))>;
> 
> Since my back-end supports floating-point literals in the instructions, I'd rather not introduce additional instructions needlessly.

ARM has some instructions that accept certain floating point immediates.

Its asmprinter supports both int64_t getImm() and ConstantFP* getFPImm() operands for these instructions.  Integer values are interpreted as the bit pattern of a double. See ARMInstPrinter::printVFPf64ImmOperand().

/jakob