[LLVMdev] Patch to synthesize x86 hadd instructions; need help with the tablegen bits

[Bruno Cardoso Lopes]

> I added the avx checks to the same file (in which case calling it
> sse3-haddsub.ll is not so great).

Oops, I missed that.

>> 4) Your tablegen modifications are totally fine, for the intrinsics just
>> do:
>>
>> let Predicates = [HasSSE3] in {
>> def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2),
>>           (HADDPSrr VR128:$src1, VR128:$src2)>;
>> def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)),
>>           (HADDPSrm VR128:$src1, addr:$src2)>;
>> ...
>>
>> and
>>
>> let Predicates = [HasAVX] in {
>> def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), VR128:$src2),
>>           (VHADDPSrr VR128:$src1, VR128:$src2)>;
>> def : Pat<(int_x86_sse3_hadd_ps (v4f32 VR128:$src1), (memop addr:$src2)),
>>           (VHADDPSrm VR128:$src1, addr:$src2)>;
>> ...
>
> I came up with a vim macro that added them for me (see attached patch).
> Probably there is a way to compress this using tablegen magic, but I don't
> know how.

Cool! This is fine! :)

> OK to apply?

LGTM! Yep!

-- 
Bruno Cardoso Lopes
http://www.brunocardoso.cc