[LLVMdev] VLIW Ports

[Carlos Sánchez de La Lama]

Hi,

> Has anyone attempted the port of LLVM to a VLIW architecture?  Is there 
> any publication about it?

I have developed a derivation of MachineInstr class, called
MachineInstrBundle, which is essnetially a VLIW-style machine
instruction which can store any MI on each "slot". After the scheduling
phase has grouped MIs in bundles, it has to call MIB->pack() method,
which takes operands from the MIs in the "slots" and transfers them to
the superinstruction. From this point on the bundle is a normal
machineinstruction which can be processed by other LLVM passes (such as
register allocation).

The idea was to make a framework on top of which VLIW/ILP scheduling
could be studies using LLVM. It is not completely finished, but it is
more or less usable and works with a trivial scheduler in a synthetic
MIPS-VLIW architecture. Code emission does not work though (yet) so
bundles have to be unpacked prior to emission.

I was waiting to finish it to send a patch to the list, but if you are
interested I can send you a patch over svn of my current code.

BR

Carlos