[LLVMdev] stack alignment and backend

[Jim Grosbach]

On Oct 27, 2011, at 2:19 PM, JP wrote:

> I'm running into the same problem mentioned here:
> http://lists.cs.uiuc.edu/pipermail/llvmdev/2011-February/038027.html
> but I think the underlying problem is different from what he mentions.
> 
> The stack on the processor I'm working on is aligned to 4 bytes per the 
> ABI but stack objects can be created with higher alignments (datalayout 
> of i64:32:32). As an example, I'm running into a test case where an i64 
> is aligned to 8 bytes but the stack pointer is only 4 byte aligned.  I 
> see that the offsets of the frame index is being aligned to the proper 8 
> byte alignment but generated code seems to assume the stack pointer is 8 
> byte aligned - I don't see any code to force the alignment to the 8 byte 
> boundry.  I seem to be missing some step in the backend to maintain the 
> alignment.
> 
> Am I missing something when I'm eliminating the frame indices? Is the 
> stack pointer supposed to get adjusted to the higher alignment in the 
> prologue?

Yes, The target is responsible for doing this. ARM and x86 both implement this, so they'd be good places to look. In particular, look for references to "dynamic stack realignment."


>  Is the i64 store (which is aligned to 8 bytes) supposed to truncate the lower address bits?

No, the address should always be aligned going into the instruction.

When stack slots are allocated for frame indices, they will be aligned according to the alignment of the objects that will go into them, but only relative the the stack alignment on function entry. If the ABI stack alignment is less, then the compiler has to generate dynamic stack realignment for that function.

-Jim