[LLVMdev] Constraints with Subregisters

[Jakob Stoklund Olesen]

On Oct 15, 2011, at 11:04 AM, Johannes Birgmeier wrote:

> Hello,
> 
> is there a way to formulate a constraint like this:
> 
> let Constraints = "${src:sub_even} != $dst" in { ... }
> 
> , that is, only if a subregister of $src != $dst then ...?

No.

> Perhaps this is entirely the wrong way anyway. I'm trying to implement 
> (s/z/any)ext & trunc from 32 to 64 bit integer on a TI C64x processor. 
> 64 bit ints are always stored in two adjacent registers (not uncommon, 
> cf. SystemZ and Sparc float). The processor does not have a special 
> instruction for this (unlike Sparc, if I'm not mistaken), so it 
> basically boils down to a "mv ${src:sub_even}$dst". Obviously, this can 
> be omitted if the output would be "mv X, X".

That sounds a lot like what the Blackfin target is doing:

def : Pat<(i32 (anyext D16L:$src)),
          (INSERT_SUBREG (i32 (IMPLICIT_DEF)),
                         (i16 (COPY_TO_REGCLASS D16L:$src, D16L)),
                         lo16)>;

All of these operations becomes copies, and are very likely to be eliminated.

/jakob