[LLVMdev] TableGen For Loops

[Jakob Stoklund Olesen]

On Oct 6, 2011, at 10:25 AM, David A. Greene wrote:

> greened at obbligato.org (David A. Greene) writes:
> 
>> So here's why I think the for loop proposal can't be a preprocessing
>> phase.  Down in the guts of this I fundamentally need to be able to do
>> this:
>> 
>> multiclass blah<list<int> Values> {
>>  for v = Values {
>>    def DEF#v : base_class<v>;
>>  }
>> }
>> 
>> Will that work?  Is the for loop evaluated after parameter binding?
> 
> I think I can actually make this work using the existing multidef
> feature code.  The ideas are fundamentally the same.  I do like the
> for syntax a lot better.
> 
> Che-Liang, would you mind if I played around with changing the multidef
> parsing to recognize your for syntax?  Your code will work in places
> that multidefs can't right now (as Jakob noted) and we want to retain
> that ability.  I would be working on integrating for loops into TableGen
> proper, not as a preprocessor.

+1 for not adding a preprocessor.

There seems to be two use cases for this:

1. Generating a sequence of similar top-level defs, for example registers named R0--R15.

2. Injecting patterns into multiclasses.

It seems to me that the same mechanism could support both.

/jakob