[LLVMdev] [RFC] Proposal to make LLVM-IR endian agnostic

[Tom Prince]

I wonder if this could be handle specifying that certain address spaces
have one or another endianness, which is not necessarily the same as the
processor endianness.

Your main requirement seems to be that you need to access to banks of
memory, with different endianess, and that you the first stage IR to be
able to be run on either endianness processor, without change. I would
assume that any given pointer points either to host memory, device
memory, or private memory, and that these pointers never get mixed. This
seems an ideal use of memory spaces.

  Tom