[LLVMdev] x86 backend assembly - mov esp->reg

[Nowicki, Tyler]

I'm not an expert in this area, I'm just going off of the Intel 64 and IA-32 Architectures Optimization Reference Manual. Also, I'm looking at atom on llvm which has its own set of limitations. From page 595, section 13.3.3.5 Parameter Passing, 'For Intel Atom processors, "bool" and "char" value should be passed onto and read off of the stack as 32-bit data.' The description is a little longer if you want to read more.

http://www.intel.com/content/www/us/en/architecture-and-technology/64-ia-32-architectures-optimization-manual.html

Tyler Nowicki
Software Developer
Intel Corporation

-----Original Message-----
From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of Joerg Sonnenberger
Sent: Thursday, November 24, 2011 14:02 PM
To: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] x86 backend assembly - mov esp->reg

On Thu, Nov 24, 2011 at 11:39:32AM -0700, Nowicki, Tyler wrote:
> When compiled for atom with clang in 32-bit mode the 8-bit variables 
> in test use 32-bit registers:

That's fine since it can avoid partial stales and the value of the padding is undefined.

> However, the 8-bit variables in PartialRegisterOperationsTestChar use 
> 8-bit registers:

Same argument. It wants to use the value of the 8bit registers, so setting them up via 32bit ops could create a partial register stale.

Do you disagree?

Joerg
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