[LLVMdev] Post increment and register pressure

[Evan Cheng]

On Nov 7, 2011, at 8:51 AM, Sundeep wrote:

> Hi all,
> 
> I am analyzing auto inc/dec optimization on ARM. On some loops, I noticed
> aggressive post increment is resulting in poor code due to increased
> register pressure.
> 
> I was wondering if there is a way to estimate register pressure during DAG
> Combiner. I am trying to come up with some heuristic based on # of DAG
> nodes, # of live ins and live outs, # of machine registers etc. Any
> suggestions?

You really can't accurately estimate register pressure at this stage.

Evan

> 
> Thanks.
> 
> -Sundeep
> 
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