[LLVMdev] Question about ARM/vfp/NEON code generation

[David Dunkle]

Thanks, that helps a lot. 

> All chips (to date) with NEON have VFP3, so it's safe to assume that a
-mfpu=neon will have VFP3, so all the decisions 
> about code generated for VFP3 can safely be assumed by targets with
NEON.
 
Just to confirm my understanding, can I correctly say in general that
the llc code generator might blur distinctions between NEON and VFP3
when it can do so safely?

-David

-----Original Message-----
From: rengolin at gmail.com [mailto:rengolin at gmail.com] On Behalf Of Renato
Golin
Sent: Friday, May 27, 2011 2:38 AM
To: David Dunkle
Cc: llvmdev at cs.uiuc.edu
Subject: Re: [LLVMdev] Question about ARM/vfp/NEON code generation

On 27 May 2011 02:04, David Dunkle <ddunkle at arxan.com> wrote:
> In all cases, I get code that looks pretty very the same; its like 
> what is below. However, I am expecting to see instruction level 
> differences between the vfp3 and neon versions. When I do the same 
> with gcc 4.2 I do see differences in the generated code.

Hi David,

You could see different instructions (as gcc does, you say), but it's
not necessary.

Your example has only floating point arithmetic, which both VFP3 and
NEON can do, so the final assembly will be similar. If you start using
integer arithmetic, than you can see vector instructions for NEON (if
it's vectorized) and not for VFP3.

All chips (to date) with NEON have VFP3, so it's safe to assume that a
-mfpu=neon will have VFP3, so all the decisions about code generated for
VFP3 can safely be assumed by targets with NEON.

Hope that answers your questions.

cheers,
--renato