[LLVMdev] Floating Point Register Allocation in X86 backend

[aparna kotha]

Hi Guys,

I was working on some floating point intensive benchmarks and realize that
the floating point register allocation in llvm assumes that there are only 7
floating point registers in X86, whereas the hardware has 8.

Line number

00266   assert(Reg >= X86::FP0 && Reg <= X86::FP6 && "Expected FP register!");


of X86FloatingPoint.cpp.

Is there any reason for only counting from 0 to 6, when there are actually
8  in hardware ?

Is there an assumption somewhere else, that I am missing.



Thanks and Regards

Aparna Kotha

Graduate Student
University of Maryland, College Park
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