[LLVMdev] LLVM evaluation

[Dan Gohman]

On May 24, 2011, at 6:29 AM, Frank Isamov wrote:

> Hi,
> 
> My organization is doing a technology comparison between GCC
> optimization/backend and LLVM infrastructures to select the best
> environment for our next product. Would you please help me to find
> answers on the following features’ list support availability inside
> current (or near future) LLVM implementation:
> 
> 1.	Intrinsic function support

http://llvm.org/docs/ExtendingLLVM.html#intrinsic

> 2.	Semi-standard embedded C types (complex, fractional) support

In LLVM, front-ends must lower these to lower-level types.  This is often
sufficient, though it impedes custom high-level optimizations.

> 3.	Target specific built-in types support (like 48-bit integrals)

Somewhat.  LLVM's midlevel optimizer type system can handle
non-power-of-two integer types.  Support for non-power-of-two integer
types in the backend is limited to lowering them into power-of-two integer
types though.

> 4.	Types similar to GCC vectorization types

http://llvm.org/docs/LangRef.html#t_vector

> 5.	Overlapped register classes support (same instructions, but working
> inside different execution units on separate registers set)

No.  You can define separate instructions, but there's nothing to help select
between them.  In particular, LLVM has nothing to compare with GCC's
multi-alternative constraints.

> 6.	Peephole optimization that works on non-sequential instructions (in
> contrast to GCC’s peephole)

"Peephole" is ambiguous here. LLVM can do simplifications on SSA graphs,
which are non-sequential. GCC can do this too.  But perhaps you're thinking
of something more specific.

> 7.	Parallelism (explicit instruction bundling) for VLIW architectures

No.

> 8.	Delay slots support

You can look at what LLVM's MIPS and Sparc backends do.

> 9.	Software pipelining

No.

> 10.	Quality of alias analysis

http://llvm.org/docs/AliasAnalysis.html#exist

but note that -seens-aa and -ds-aa are not generally usable, and -scev-aa is
currently a curiosity.

> 11.	Registers renaming optimization

Can you be more specific?

> 12.	Speculative scheduling

No.

Dan