[LLVMdev] predicates and conditional execution

[Justin Holewinski]

On Tue, May 24, 2011 at 3:02 AM, roy rosen <roy.1rosen at gmail.com> wrote:

> Hi,
>
> I was wondering if LLVM supports predicates and conditional execution.
> Something like we have in IA64.
> There is a register class of predicates and then every instruction may
> be predicated by a register from this class.
> For example:
>
> cmp_less p, x, y // p is a predicate which gets the result of x < y
> p add x, x, 2 // if p then do the add instruction
>
> Is there support in LLVM to something like that?

Which architecture can show a good example for the implementation of that?
>

You may want to look at the PTX back-end.  The PTX assembly language
supports exactly what you are describing, and we currently use it to
implement conditional branching.  There is a register class for predicates
(i1 in LLVM) and all machine instructions have a predicate operand and
predicate filter (PTX supports inverted predicates).  For un-predicated
instructions, the predicate operand is just set to the special NoRegister
constant.


>
> Thanks, Roy.
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-- 

Thanks,

Justin Holewinski
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