[LLVMdev] Memory Subsystem Representation

[David A. Greene]

Eli Friedman <eli.friedman at gmail.com> writes:

> On Tue, May 3, 2011 at 8:40 AM, David Greene <dag at cray.com> wrote:
> 1. What is the expected use?  Are we talking about loop optimizations here?

Initially, anything that is interested in cache configuration would find
this useful.  This might include:

- cache blocking
- prefetching
- reuse analysis

I think mostly it would be loop-level stuff (that's where the time is
spent, after all) but I also know of various papers that do IPO
cache-related analysis and transformation.

> 2. IR-level passes don't have access to a TargetMachine; is that okay?

I thought about that too.  I don't know any better place to put it
because this is very (sub)target-specific stuff.  I think in the future
we may want to consider a generic interface for IR-level passes to query
some target-specific parameters that are generally useful.  Cache
structure would be one.

Our (Cray) current uses are all in Machine-level passes but that's
because most of our analysis and transformation is done outside LLVM.

Mostly I'm concerned about getting the abstraction right.  Or at least
reasonable.  :)

                              -Dave