[LLVMdev] Possible CellSPU Bug?
B. Scott Michel
scottm at mail.face.aero.org
Thu Mar 3 09:57:10 PST 2011
On Mon, 31 Jan 2011 11:34:05 -0600, greened at obbligato.org wrote:
> Kalle Raiskila <kalle.raiskila at nokia.com> writes:
>
>> Looks like a bug to me. xshw (extend signed half-word(16bits) to
>> word(32bits)) takes a v8i16 and produces a v4i32. This has likely
>> gone
>> unnoticed as there is only one type of vector register class (i.e.
>> VECREG) that is used for all vectors.
>>
>> Nice catch :) Are there more of these?
>
> I don't know. I stopped implementing the stricter typechecking when
> I
> saw this. I wanted to make sure there wasn't some official trickery
> going on. :)
>
> -Dave
It's not official trickery. It's just the way things need to be done on
Cell.
-scooter
--
B. Scott Michel, Ph.D.
Director, Computer Systems Research Department
The Aerospace Corporation
Ofc: (310) 336-5034
Cell: (310) 426-4993
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