[LLVMdev] Please review my patch to make GHC calling convention work on ARM

[David Terei]

On 30 June 2011 20:51, Stephen Blackheath [to LLVM-dev]
<effusively.proffer.stephen at blacksapphire.com> wrote:
> David,
>
> Thanks for that - I emailed Karel Gardas. I've got GHC successfully
> registerised on ARM, and I'm just starting on pushing it upstream.

Great!

> The reason why I'm avoiding the R0-R3 registers is mainly because my
> qemu-based ARM VM takes days to compile everything, and I was being
> conservative.  The GHC code can call directly out to C, so it would need to
> save its own R0-R3 when it does that.  I know GHC can do this, presumably
> efficiently (using the caller-saves registers last) so I'm sure it's better
> to do that.  Perhaps you can advise me.
>
> I was planning on looking into this later, but if you think it's better to
> do it once and do it right, then let me know and I'll sort that out.

Yes I think its better to sort out now. I would advise you use R0 -
R3. Also, try to put the more import GHC virtual registers (Base, Sp,
Hp, R1, SpLim) into callee save registers and put the less import R2 -
R8 registers into caller save.

You probably know that the place in GHC to modify is
'includes/stg/MachRegs.h' and use a CPP defines like '#define
CALLER_SAVES_R3' to indicate which registers GHC needs to save across
C calls.

Cheers,
David