[LLVMdev] Question about porting LLVM - code selection without assembler feature

[David A. Greene]

Lu Mitnick <king19880326 at gmail.com> writes:

> Hello all,
>
> I am adding a new target into LLVM. However there is a assembler for
> that target and I just want LLVM to generate assembly. I read the
> document "Writing an LLVM Backend". I am wondering to know whether I
> can ignore the Inst field in the following example:

I'm not an expert here so I'll defer to others.

> Second, I have read the documentation of "TableGen Fundamentals" and
> "The LLVM Target Independent Code Generator". But I don't know how to
> fill the dag filed of instruction. like [(store IntRegs:$src,
> ADDRrr:$addr)] of the following example:
>
> def STrr  : F3_1< 3, 0b000100, (outs), (ins MEMrr:$addr, IntRegs:$src),
>
>                "st $src, [$addr]", [(store IntRegs:$src, ADDRrr:$addr)]>;
>
> Would anyone mind to tell me where to find the documentation of the
> dag in Independent Code Generator??

Think of the DAG pattern as a LISP expression.  Each level of parens is
a subtree in the DAG, so

             +
            / \
           /   \
          a     *
               / \
              b   c

Becomes:

[(add REGCLASS:$a, (mul REGCLASS:&b, REGCLASS:$c))]

That's the pattern your codegen will match and turn into the asm string
you provide (The "st $src, [$addr]" in your example).

Does that help?

                               -Dave