[LLVMdev] Question about porting LLVM - variable length lnstruction

[Lu Mitnick]

Hello all,

I am adding a new target into LLVM. However the instruction length of the
target I ported is variable. Each instruction is at least 1 + 1
bytes(required) and optional parts(There are many forms of optional part
suck like i16, i32, i64, i16 + i16, i16 + i32, i16 + i64, i32 + i32, i64 +
i64).  The form of optional part is determined by the required parts. In
other words, each instruction fetch have two phase: one for fetch the
required part and another for optional part. There is similar problem of X86
target but it is too complex to understand for me. I am wondering to know
whether there is another target with this problem and I should trace?? Or
how could I deal with this problem??

thanks a lot

yi-hong
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