[LLVMdev] Unreachable executed with fast Regalloc and Sparc backend

[Wesley Peck]

On Jan 7, 2011, at 2:36 PM, Venkatraman Govindaraju wrote:
> When I run LLC with option "-O0 -march=sparc" on following testcase,
> fast register allocator crashes with "UNREACHABLE executed" error. LLC
> generates code successfully with other standard register allocators
> available.

I haven't investigated the Sparc backend specifically but...

My guess is this is related to this entry in SparcInstrInfo.td:
    let Uses = [O0, O1, O2, O3, O4, O5],
        hasDelaySlot = 1, isCall = 1,
        Defs = [O0, O1, O2, O3, O4, O5, O7, G1, G2, G3, G4, G5, G6, G7,
        D0, D1, D2, D3, D4, D5, D6, D7, D8, D9, D10, D11, D12, D13, D14, D15] in {
      def CALL : InstSP<(outs), (ins calltarget:$dst),
                        "call $dst", []> {
        bits<30> disp;
        let op = 1;
        let Inst{29-0} = disp;
      }

The Uses=[O0,O1,O2,O3,O4,O5] is causing this crash (and similar crashes in the PQBP and Greedy allocators if I remember right). I fixed this in the MicroBlaze backend by remodeling the call instructions to be variadic like other backends. See the MBlazeInstrInfo.td changes in this commit:
http://www.llvm.org/viewvc/llvm-project?view=rev&revision=121994

NOTE: In the commit R1 is the dedicated stack register on the MicroBlaze architecture.

--
Wesley Peck
University of Kansas
SLDG Laboratory