[LLVMdev] x86 disassembler rejecting valid code

[Richard Smith]

Hi,

The x86 (32-bit) disassembler can't disassemble any of the following:

  0x2b 0xc9
  0x8a 0xc8
  0xdd 0x04 0x24

These are:

  subl %ecx, %ecx
  movb %al, %cl
  fldl (%esp)

I've attached patches to bug#8873 which fix all these issues, but I'm not
confident that I've fixed them the right way.


The first two problems are caused by the instructions setting
'isCodeGenOnly = 1', which causes tblgen to miss them from the
disassembler's tables. The code says:

  // The disassembler should know about this, but not the asmparser.
  let isCodeGenOnly = 1;

However, that's not the effect which isCodeGenOnly has. Is the comment
wrong, or is tblgen wrong? The patch I attached to bug#8873 "fixes" this
by removing the 'isCodeGenOnly = 1' from these instructions. All tests
still pass.


The fldl can't be disassembled because tblgen contains a hack which marks
all instructions whose name contains the string "64" as being
X86_64-specific. fldl's instruction is named LD_F64, so can't be
disassembled in 32-bit mode, even though it's a valid 32-bit instruction.

I think the right fix for this is to make the instructions specify whether
they're available on x86, or just on x86_64, and use that knowledge in
tblgen rather than guessing from the instruction's name. The patch I
attached to bug#8873 works around this by adding a superclass check to
tblgen to see if the instruction is one of the exceptions to this
"64"-in-name rule, but that's a horrible hack...


If someone can point me in the right direction, I'm happy to put together
patches to fix these issues in a more correct manner!

Thanks,
Richard