[LLVMdev] TableGen syntax for matching a constant load

[Jakob Stoklund Olesen]

On Feb 26, 2011, at 6:40 PM, Chris Lattner wrote:

> It should be reasonably easy to add a new "optsize2" function attribute to LLVM IR, and have that be set with -Oz (the "optimize for size at any cost") flag, which could then enable stuff like this.
> 
> There are lots of other cases where this would be useful, such as forced use of "rep; movsb" on x86, which is much smaller than a call to memset, but also much slower :).

Such a mode would also:

- Lower the inlining threshold to 0 so functions are only inlined when it would decrease the overall code size.

- Disable the SSEExecutionDomain pass which selects equivalent, but larger vector instructions.

- Disable tail duplication and be more aggressive about tail merging.

- Perhaps select x86 instructions with 16-bit immediates?

You could also tweak the heuristics used by register coalescing and spill code placement, but that involves more work.

/jakob