[LLVMdev] post-inc loads/stores

[Bob Wilson]

On Feb 7, 2011, at 8:57 AM, Jim Grosbach wrote:

> Hi Jonas,
> 
> There's not really a very clean way to do this currently. The ARM backend does it as you indicate with the writeback register listed as an output as well as an input and marked as a tied operand constraint. Search for _PRE and _POST in ARMInstrInfo.td for examples. For most instances, instruction selection is done via custom lowering, not an ISel pattern on the pattern; see ARMISelLowering.cpp for that.

Specifically, there is no way to use a pattern in the .td file for an instruction that produces multiple results.  That is why the updating loads are selected with custom C++ code.

For updating stores, the updated address is the only result and they can generally be selected from patterns in the .td files.