[LLVMdev] Stop MachineCSE on certain instructions

girish gulawani girishvg at yahoo.com
Tue Dec 20 19:03:18 PST 2011

Hi Evan.
The hasSideEffects method I believe operates only on Inline Assembly (IA) blocks. What if such a sequence is not part of IA?


If an instruction is marked as side-effect free then it's a candidate for CSE. Try marking the instruction with hasSideEffects.
>On Dec 17, 2011, at 12:24 PM, Johannes Birgmeier wrote:
>> Hello,
>> I'm writing for a backend and have a complicated instruction bundle (3 
>> instructions) that has to be executed like a single block (meaning: if 
>> the first instruction is executed, all three have to be executed to 
>> obtain the result, though not necessarily without other instructions in 
>> between). Unfortunately, MachineCSE gets in the way sometimes and rips 
>> it apart.
>> Is there a way to stop CSE from doing its thing (common subexpression 
>> elimination) for certain instructions?
>> I've already tried glueing (gluing?) them together, but that doesn't 
>> seem to make a difference.
>> Regards,
>> Johannes Birgmeier
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu        http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>LLVM Developers mailing list
>LLVMdev at cs.uiuc.edu        http://llvm.cs.uiuc.edu
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20111221/22d42e8b/attachment.html>

More information about the llvm-dev mailing list