[LLVMdev] Stop MachineCSE on certain instructions

Johannes Birgmeier e0902998 at student.tuwien.ac.at
Sat Dec 17 12:24:44 PST 2011


I'm writing for a backend and have a complicated instruction bundle (3 
instructions) that has to be executed like a single block (meaning: if 
the first instruction is executed, all three have to be executed to 
obtain the result, though not necessarily without other instructions in 
between). Unfortunately, MachineCSE gets in the way sometimes and rips 
it apart.

Is there a way to stop CSE from doing its thing (common subexpression 
elimination) for certain instructions?

I've already tried glueing (gluing?) them together, but that doesn't 
seem to make a difference.

Johannes Birgmeier

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