[LLVMdev] The nsw story
atrick at apple.com
Tue Dec 6 14:53:14 PST 2011
On Dec 6, 2011, at 2:31 PM, David A. Greene wrote:
> Andrew Trick <atrick at apple.com> writes:
>> The optimizations we're talking about are forms of safe
>> speculation. Doing that at IR level is fine.
>> Hardware support for NaT bits + check instructions have been popping
>> up on this message thread. Hardware speculation exists solely to
>> support unsafe speculation, in which certain operations need to be
>> reexecuted under certain conditions. It is not something we would ever
>> want to represent in IR. It isn't ammenable to CFG+SSA form.
>> Runtime checking for undefined behavior would be implemented as
>> overflow checks, etc. by the front end. I don't think it's related to
>> unsafe speculation. In other words, I don't see the purpose of a
>> "check/foodtaster" instruction.
> The purpose of all of these discussions is to alleviate the
> computational explosion of static analysis that Dan described in the
> presence of nsw bits. The point is to reduce the search space for
> static checking. If we don't care about that, then all of this
> discussion is moot. :)
Right. I can see how a value-undefined-if-poison marker could yield more precise static analysis. I didn't mean to discourage that approach, although I'm not aware of any imminent problem that it solves.
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