[LLVMdev] Tying an instruction to a specific set of registers

[Jakob Stoklund Olesen]

On Aug 16, 2011, at 9:44 AM, Villmow, Micah wrote:

> Jim, 
> Thanks for the hints. Does LLVM allow allocation of the same register across register classes?

Yes.

> For example, in the ARM backend, can an instruction write to R0 when it is part of register class tGPR, but then use R0 in the next instruction as a source register from the rGPR class?
> 
> If LLVM can do this, then this will work.

This should all work.

It is a good idea to ensure that for all overlapping register classes, the intersection is also a register class. Then the coalescer will use that class when joining cross-class copies.

I am planning to teach tablegen to infer these register classes automatically, but for now you need to create them manually.

/jakob