[LLVMdev] New ARM disassembler - unpredictable instructions

[James Molloy]

Hi,

 

I'm looking at the new ARM disassembler, and performing testing to see if
there are any obvious bugs I can fix. Overall it looks really nice - I've
only found one obvious bug that I'm packaging up a patch for now.

 

Currently it does not provide information as to whether a particular
bitpattern was UNPREDICTABLE or not. For example, an invalid bitpattern may
return correct disassembly for an alternative, predictable instruction
meaning that the sequence X -> disassemble -> assemble -> Y could end up
with X being different to Y.

 

This is fine, however there should be some notification to the user that the
instruction was unpredictable. I'd suggest that this information needs to be
stored in the MCInst somehow.

 

Does anyone have any comment on this?

 

Cheers,

 

James

 
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