[LLVMdev] IMPLICIT_DEF?

[Jakob Stoklund Olesen]

On Apr 7, 2011, at 6:48 AM, Jonas Paulsson wrote:

> Hi,
>  
> I have a MachineInstr that writes to a subreg, but clobbers the superreg.
>  
> How should I BuildMI this instruction?
>  
> I try to do a 
>  
> IMPLICIT_DEF super_reg
> and then write to a subreg of that super register
>  
> , but it gets DCE:ed.

Right. IMPLICIT_DEF in machine code means the same as the LLVMIR 'undef' value. The IMPLICIT_DEF instructions become MachineOperand <undef> flags during ProcessImplicitDefs.

>  Is there a way to express this clobbering of a superregister?

Is this before or after register allocation?

If you are talking about physical registers, you may not have to do anything.

If you mean virtual registers, add an <imp-def> MachineOperand for the super register.

/jakob

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