[LLVMdev] Assert in VerifySDNode

[Duncan Sands]

Hi Micah,

>>> assert(!isa<MemSDNode>(N)&&  "Bad MemSDNode!");
>>
>> you can't use getNode to allocate a MemSDNode because it does not
>> allocate
>> enough memory (MemSDNode has extra fields beyond the operands).
>>
> [Villmow, Micah] Duncan, thanks for the reply. But I don't see how I am generating a MemSDNode with this instruction.

well either a MemSDNode or one of the other cases checked for.  Assuming it
was a MemSDNode, then isa<MemSDNode> evaluates to true if you are in one of
the following cases:

   static bool classof(const SDNode *N) {
     // For some targets, we lower some target intrinsics to a MemIntrinsicNode
     // with either an intrinsic or a target opcode.
     return N->getOpcode() == ISD::LOAD                ||
            N->getOpcode() == ISD::STORE               ||
            N->getOpcode() == ISD::PREFETCH            ||
            N->getOpcode() == ISD::ATOMIC_CMP_SWAP     ||
            N->getOpcode() == ISD::ATOMIC_SWAP         ||
            N->getOpcode() == ISD::ATOMIC_LOAD_ADD     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_SUB     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_AND     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_OR      ||
            N->getOpcode() == ISD::ATOMIC_LOAD_XOR     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_NAND    ||
            N->getOpcode() == ISD::ATOMIC_LOAD_MIN     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_MAX     ||
            N->getOpcode() == ISD::ATOMIC_LOAD_UMIN    ||
            N->getOpcode() == ISD::ATOMIC_LOAD_UMAX    ||
            N->isTargetMemoryOpcode();
   }

Probably it is isTargetMemoryOpcode.  For X86 there are a lot of these starting
with

       // ATOMADD64_DAG, ATOMSUB64_DAG, ATOMOR64_DAG, ATOMAND64_DAG,
       // ATOMXOR64_DAG, ATOMNAND64_DAG, ATOMSWAP64_DAG -
       // Atomic 64-bit binary operations.
       ATOMADD64_DAG = ISD::FIRST_TARGET_MEMORY_OPCODE,
       ATOMSUB64_DAG,
       ATOMOR64_DAG,
       ATOMXOR64_DAG,
       ATOMAND64_DAG,
       ATOMNAND64_DAG,
       ATOMSWAP64_DAG,

       // LCMPXCHG_DAG, LCMPXCHG8_DAG - Compare and swap.
       LCMPXCHG_DAG,
       LCMPXCHG8_DAG,

       // VZEXT_LOAD - Load, scalar_to_vector, and zero extend.
       VZEXT_LOAD,

       // FNSTCW16m - Store FP control world into i16 memory.
       FNSTCW16m,

       /// FP_TO_INT*_IN_MEM - This instruction implements FP_TO_SINT with the
       /// integer destination in memory and a FP reg source.  This corresponds
       /// to the X86::FIST*m instructions and the rounding mode change stuff. It
       /// has two inputs (token chain and address) and two outputs (int value
       /// and token chain).
       FP_TO_INT16_IN_MEM,
...

Is your opcode one of them?

Ciao, Duncan.