[LLVMdev] inline asm constraints examples/tests

[Dale Johannesen]

On Sep 21, 2010, at 2:45 PMPDT, John Thompson wrote:

> fatal error: error in backend: Ran out of registers during register allocation!
> Please check your inline asm statement for invalid constraints:
> INLINEASM <es:>, 0, 10, %reg16396<def>, 10, %reg16397<def>, 10, %reg16398<def>, 10, %reg16399<def>, 10, %reg16400<def>, 10, %reg16401<def>,10, %reg16402<def>, 10, %reg16403<def>, 10, %reg16404<def>, 10, %reg16405<def>, 10, %reg16406<def>, 10, %reg16407<def>, 2147483657, %EAX, 2147549193, %ECX, 2147614729, %EDX, 2147680265, %ESI, 2147745801, %EDI, 2147811337, %EBX, 2147876873, %EBP, 2147942409, %reg16403, 2148007945, %reg16404, 2148073481, %reg16405, 2148139017, %reg16406, 2148204553, %reg16407, 14, %EFLAGS<earlyclobber,imp-def>, <<badref>>; GR32:%reg16396,16397,16398,16399,16400,16401,16402,16403,16404,16405,16406,16407,16403,16404,16405,16406,16407
> For the code:
>  
> int a, b, c, d, e, f, g, h, i, j, k, l;
> void
> f1 (void)
> {
>   __asm__ volatile (""
>       : [a] "+r" (a), [b] "+r" (b), [c] "+r" (c), [d] "+r" (d),
>         [e] "+r" (e), [f] "+r" (f), [g] "+r" (g), [h] "+r" (h),
>         [i] "+r" (i), [j] "+r" (j), [k] "+r" (k), [l] "+r" (l));
> }
> This confused me since it doesn't use multiple-alternative constraints, meaning it should fall back to the original logic.  I'm thinking this problem probably isn't related to my code.  To try to confirm this, I built an LLVM tree I had checked out on August 24 (rev 111968) and I see the same error.

Yes, this test asks for 12 different registers, so there's no way it could pass on x86-32, which has only 6 (at most).