[LLVMdev] Re : How to assign a constant to a register?
leledumbo
leledumbo_cool at yahoo.co.id
Wed Oct 20 06:39:28 PDT 2010
> from what you say, I assume you have some kind of representation (AST or a
> lower-level intermediate representation) from which you generate LLVM
> assembly.
> Is this representation in SSA form?
Yes, the representation is an AST. It's not in SSA yet, as it's a direct
representation of the input. I'm confused for this node:
:=
/ \
x 0
where x is a local variable.
> If it is, you might want to do a "copy propagation" transformation that
> replaces
> the uses of all variables that are assigned a constant value by their
> definitions.
I'll consider it, it would useful for constant expression.
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