[LLVMdev] MachineOperand::TargetFlags question
Villmow, Micah
Micah.Villmow at amd.com
Tue Oct 19 07:59:53 PDT 2010
I understand that there are lots of MachineOperands created, but I need a way to keep track of the channel that the operand utilizes within a vector register. Since my target uses 32x4 vector registers, I need to store at least 3 bits of information for each channel(x, y, z, w, _, 0, 1) in the fully generic case. In the most common case I only need 2 bits(x, y, z, w) and that will fit in the current size.
If there is a better way to do this, I'm open for suggestions. Otherwise I'll move forward with the TargetFlags.
Micah
> -----Original Message-----
> From: Jakob Stoklund Olesen [mailto:stoklund at 2pi.dk]
> Sent: Monday, October 18, 2010 5:04 PM
> To: Villmow, Micah
> Cc: LLVM Developers Mailing List
> Subject: Re: [LLVMdev] MachineOperand::TargetFlags question
>
>
> On Oct 18, 2010, at 11:59 AM, Villmow, Micah wrote:
>
> > I'm looking at utilizing the MachineOperand::TargetFlags and I'm
> wondering if there is a specific reason on limiting the size of the
> flags to 8 bits.
>
> We create *LOTS* of MachineOperand instances, so it needs to be as
> small as possible.
>
> > Also are there any assumptions on what can be validly used here that
> I should keep in mind? Ideally I need 28 bits but I can code the major
> cases using all 8 bits, but I don't want to clobber anything that might
> be used internally in LLVM.
>
> I think the target gets to decide what all the bits mean.
>
> /jakob
>
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