[LLVMdev] register constraints

[Jonas Paulsson]

Hi,

I have worked with GCC prior to using LLVM, and I am a bit startled to find no way to use an earlier operand as is done in GCC.

For example, a sext instruction on my target takes one the operand of a low-part register, and then sign extends into the full register.I find that there is no way to use for example (set RC:$srsc, sext($src, 16)), or in any other way use a sext operator to perform this on one register.

It would be neat to be able to do this somehow. When I define a sext_inreg instruction, LLVM does not match the sext node in the DAG with this, unfortunately.

How is feats like this supposed to be done? Right now it seems that I need to do a custom lowering impelementation to replace the sext-SDValue with a subgraph with a 32bit virtual register, a copy to the low subregister, and then a sext_inreg node. Am I right?

I would appreciate any answer,

Jonas


 		 	   		  
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