[LLVMdev] [Q] x86 peephole deficiency

[Chris Lattner]

On Oct 6, 2010, at 6:16 PM, Gabor Greif wrote:

> Hi all,
> 
> I am slowly working on a SwitchInst optimizer (http://llvm.org/PR8125)
> and now I am running into a deficiency of the x86
> peephole optimizer (or jump-threader?). Here is what I get:
> 
> 
>         andl    $3, %edi
>         je      .LBB0_4
> # BB#2:                                 # %nz
>                                         #   in Loop: Header=BB0_1  
> Depth=1
>         cmpl    $2, %edi
>         je      .LBB0_6
> # BB#3:                                 # %nz.non-middle
>                                         #   in Loop: Header=BB0_1  
> Depth=1
>         cmpl    $2, %edi
>         jbe     .LBB0_4
> # BB#5:                                 # %sw.bb6
>         ret
> 
> the second 'cmpl' is totally redundant, which pass is
> (or would be) in charge of removing it?

MachineCSE should be in charge of zapping it.

-Chris