[LLVMdev] Fast register allocation

[Jakob Stoklund Olesen]

On May 18, 2010, at 8:23 AM, Daniel Dunbar wrote:

> You mention some potential issues on ARM, should we sort those out
> before we enable it in Clang? It's somewhat more convenient to have
> things be consistent.

Sure, I'll be testing some ARM code today. There is also Evan's new REG_SEQUENCE instruction to verify.

> I propose that at some point you just replace the old local register
> allocator with the new one, and rename the old one. Then clients don't
> need to change, and we can keep the old one available for a little
> while if we want, for testing.

I am not a big fan of renaming - it can easily cause confusion. Besides, fast-alloc goes with fast-isel.

But perhaps we could take this opportunity to let LLVMTargetMachine choose a register allocator based on the optimization level? It is already enabling fast-isel that way, and -O0 -regalloc=linearscan (which is the default) doesn't really make sense.

LLVMTargetMachine::addCommonCodeGenPasses does a decent job of building a codegen pipeline, except it needs help picking a register allocator. There is no good reason for that.

/jakob