[LLVMdev] How to get the variable mapping between the sourceandllvm bytecode
Reid Kleckner
rnk at mit.edu
Thu May 13 17:41:01 PDT 2010
The current situation is that LLVM's optimizations don't go out of
their way to preserve debug info, so you are only going to be able to
create the variable mapping with unoptimized IR.
Reid
On Thu, May 13, 2010 at 9:18 PM, Kecheng <kecheng at cecs.pdx.edu> wrote:
> Eli,
>
> Thanks very much for your reply. That's what I want to know. It works for
> this example. But I usually have to deal with the optimized bytecode with
> "-O".
> See the example:
>
>
> **************
> C source
> **************
> int h (int j, int i) {
> int tmp;
> tmp = j+i+2;
> return tmp;
> }
>
> +++++++++++++++++++++++++++++++++++++
> .ll file:
>
>
> ; ModuleID = 'simplecase.c'
> target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
> target triple = "x86_64-unknown-linux-gnu"
> define i32 @h(i32 %j, i32 %i) nounwind readnone {
> entry:
> %0 = add nsw i32 %j, 2, !dbg !0 ; <i32> [#uses=1]
> %1 = add nsw i32 %0, %i, !dbg !0 ; <i32> [#uses=1]
> ret i32 %1, !dbg !7
> }
> !0 = metadata !{i32 3, i32 0, metadata !1, null}
> !1 = metadata !{i32 458763, metadata !2, i32 1, i32 0} ; [ DW_TAG_lexical_block ]
> !2 = metadata !{i32 458798, i32 0, metadata !3, metadata !"h", metadata !"h", metadata !"h", metadata !3, i32 1, metadata !4, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
> !3 = metadata !{i32 458769, i32 0, i32 1, metadata !"simplecase.c", metadata !"/home/kecheng/cases/v2.7/simplecase/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 true, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
> !4 = metadata !{i32 458773, metadata !3, metadata !"", metadata !3, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !5, i32 0, null} ; [ DW_TAG_subroutine_type ]
> !5 = metadata !{metadata !6, metadata !6, metadata !6}
> !6 = metadata !{i32 458788, metadata !3, metadata !"int", metadata !3, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
> !7 = metadata !{i32 4, i32 0, metadata !1, null}
> +++++++++++++++++++++++++++++++++++++
>
> Now the mapping will be tmp <---->%1. We can't derive the mapping based on
> "alloca/store" instruction.
>
>
>
> Best,
>
>
>
> ________________________________
> Kecheng
> 2010-05-13
> ________________________________
> From： Eli Friedman
> Date： 2010-05-13 16:58:05
> To： Kecheng
> Cc： llvmdev
> Subject： Re: Re: [LLVMdev] How to get the variable mapping between the
> sourceandllvm bytecode
>
> On Thu, May 13, 2010 at 4:00 PM, Kecheng <kecheng at cecs.pdx.edu> wrote:
>> Hi,
>>
>> I want to get the mapping between C source's variables and bytecode
>> variables. It seems that llvm doesn't provide this mapping, so I think a
>> walk-around method is to get the instruction's mapping. I have to use
>> llvm-gcc, not clang. Any advice? Thanks.
> "int tmp;" corresponds to "%tmp = alloca i32" in the IR. You can pull
> that mapping out of the appropriate llvm.dbg.declare call. To find
> assignments to the variable, look for store instructions which store
> into "%tmp". I fail to see what the addition has to do with anything
> in this context.
> -Eli
>> Best,
>>
>> ________________________________
>> Kecheng
>> 2010-05-13
>> ________________________________
>> From： Eli Friedman
>> Date： 2010-05-13 15:38:36
>> To： Kecheng
>> Cc： llvmdev
>> Subject： Re: [LLVMdev] How to get the variable mapping between the source
>> andllvm bytecode
>>
>> On Thu, May 13, 2010 at 1:47 PM, Kecheng <kecheng at cecs.pdx.edu> wrote:
>>> Hi,
>>>
>>> I want to know the variable mapping between the source and llvm bytecode. It
>>> seems that current llvm debugging information cannot provide this mapping
>>> directly.
>>>
>>> Here is my examples (llvm 2.7). In this exmaple, I want to know the mapping:
>>> tmp<--->%4. But current llvm's debugging information can only provide that
>>> the instruction "%4 = add nsw i32 %3, 2" is at line 3 in the C source. But
>>> since there're two "+" at line 3, I don't have a direct way to know which
>>> "+" is mapped to this "add". Is there any way I can derive the mapping based
>>> on current ddg infor? Thanks.
>> You want to map the "+" in the source to a specific "add" instruction?
>> clang does provide column number info, though, which might help a
>> bit. In general, though, debug info isn't rich enough to provide that
>> sort of mapping. What are you trying to do?
>> -Eli
>>> **************
>>> C source
>>> **************
>>> int h (int j, int i) {
>>> int tmp;
>>> tmp = j+i+2;
>>> return tmp;
>>> }
>>>
>>> **************
>>> .ll file
>>> **************
>>> ; ModuleID = 'simplecase.c'
>>> target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
>>> target triple = "x86_64-unknown-linux-gnu"
>>> define i32 @h(i32 %j, i32 %i) nounwind {
>>> entry:
>>> %j_addr = alloca i32 ; <i32*> [#uses=2]
>>> %i_addr = alloca i32 ; <i32*> [#uses=2]
>>> %retval = alloca i32 ; <i32*> [#uses=2]
>>> %0 = alloca i32 ; <i32*> [#uses=2]
>>> %tmp = alloca i32 ; <i32*> [#uses=2]
>>> %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0]
>>> call void @llvm.dbg.declare(metadata !{i32* %j_addr}, metadata !0), !dbg !6
>>> store i32 %j, i32* %j_addr
>>> call void @llvm.dbg.declare(metadata !{i32* %i_addr}, metadata !7), !dbg !6
>>> store i32 %i, i32* %i_addr
>>> call void @llvm.dbg.declare(metadata !{i32* %tmp}, metadata !8), !dbg !10
>>> %1 = load i32* %j_addr, align 4, !dbg !11 ; <i32> [#uses=1]
>>> %2 = load i32* %i_addr, align 4, !dbg !11 ; <i32> [#uses=1]
>>> %3 = add nsw i32 %1, %2, !dbg !11 ; <i32> [#uses=1]
>>> %4 = add nsw i32 %3, 2, !dbg !11 ; <i32> [#uses=1]
>>> store i32 %4, i32* %tmp, align 4, !dbg !11
>>> %5 = load i32* %tmp, align 4, !dbg !12 ; <i32> [#uses=1]
>>> store i32 %5, i32* %0, align 4, !dbg !12
>>> %6 = load i32* %0, align 4, !dbg !12 ; <i32> [#uses=1]
>>> store i32 %6, i32* %retval, align 4, !dbg !12
>>> br label %return, !dbg !12
>>> return: ; preds = %entry
>>> %retval1 = load i32* %retval, !dbg !12 ; <i32> [#uses=1]
>>> ret i32 %retval1, !dbg !12
>>> }
>>> declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone
>>> !0 = metadata !{i32 459009, metadata !1, metadata !"j", metadata !2, i32 1, metadata !5} ; [ DW_TAG_arg_variable ]
>>> !1 = metadata !{i32 458798, i32 0, metadata !2, metadata !"h", metadata !"h", metadata !"h", metadata !2, i32 1, metadata !3, i1 false, i1 true, i32 0, i32 0, null, i1 false} ; [ DW_TAG_subprogram ]
>>> !2 = metadata !{i32 458769, i32 0, i32 1, metadata !"simplecase.c", metadata !"/home/kecheng/cases/v2.7/simplecase/", metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, i1 false, metadata !"", i32 0} ; [ DW_TAG_compile_unit ]
>>> !3 = metadata !{i32 458773, metadata !2, metadata !"", metadata !2, i32 0, i64 0, i64 0, i64 0, i32 0, null, metadata !4, i32 0, null} ; [ DW_TAG_subroutine_type ]
>>> !4 = metadata !{metadata !5, metadata !5, metadata !5}
>>> !5 = metadata !{i32 458788, metadata !2, metadata !"int", metadata !2, i32 0, i64 32, i64 32, i64 0, i32 0, i32 5} ; [ DW_TAG_base_type ]
>>> !6 = metadata !{i32 1, i32 0, metadata !1, null}
>>> !7 = metadata !{i32 459009, metadata !1, metadata !"i", metadata !2, i32 1, metadata !5} ; [ DW_TAG_arg_variable ]
>>> !8 = metadata !{i32 459008, metadata !9, metadata !"tmp", metadata !2, i32 2, metadata !5} ; [ DW_TAG_auto_variable ]
>>> !9 = metadata !{i32 458763, metadata !1, i32 1, i32 0} ; [ DW_TAG_lexical_block ]
>>> !10 = metadata !{i32 1, i32 0, metadata !9, null}
>>> !11 = metadata !{i32 3, i32 0, metadata !9, null}
>>> !12 = metadata !{i32 4, i32 0, metadata !9, null}
>>>
>>> Best,
>>>
>>> Kecheng
>>> 2010-05-13
>>> _______________________________________________
>>> LLVM Developers mailing list
>>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
>>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>>>
>>>
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