[LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.

renkun hbrenkun at yahoo.cn
Tue Mar 9 00:14:33 PST 2010


Thank you, Nick. 
Yes, I have add getAnalysisUsage.
As I know, some CFG is irreducible. 
At this time, Dominator Tree can not find 
some backedge. Is it means some MachineLoop is
not be found? 
dominatorTree.jpg is a previous exmaple. 

best regards!
renkun


--- 10年3月9日,周二, Nick Lewycky <nicholas at mxc.ca> 写道:

> 发件人: Nick Lewycky <nicholas at mxc.ca>
> 主题: Re: [LLVMdev] Find all backedges of CFG by MachineDominatorTree. please look at my jpg.
> 收件人: "任坤" <hbrenkun at yahoo.cn>
> 抄送: "Benoit Boissinot" <bboissin+llvm at gmail.com>, "llvm" <llvmdev at cs.uiuc.edu>
> 日期: 2010年3月9日,周二,下午2:02
> 任坤   wrote:
> > Hi:
> >     I want to do some optimization
> on MachineLoop.
> > So I want to get MachineLoopInfo from
> MachineFunction.
> >
> > I reference MachineLICM.cpp.
> > So I try to write a pass in Target/mytarget
> directory.
> > I find there is Error.
> > llvm/include/llvm/PassAnalysisSupport.h:198:
> AnalysisType&  llvm::Pass::getAnalysisID(const
> llvm::PassInfo*) const [with AnalysisType =
> llvm::MachineLoopInfo]: Assertion
> `ResultPass&&  "getAnalysis*() called on an
> analysis that was not 'required' by pass!"' failed.
> 
> Did you copy getAnalysisUsage too? The way it works is that
> you need 
> getAnalysisUsage to declare all the passes you need to
> exist before your 
> pass starts, then getAnalysis<>() inside your
> runOnMachineFunction can 
> use them. If you call getAnalysis on a Pass that you didn't
> request, 
> you'll hit this assertion.
> 
> Nick
> 
> > ****************************
> > runOnMachineFunction(MachineFunction&MF) {
> >     LI
> =&getAnalysis<MachineLoopInfo>();
> >     DT
> =&getAnalysis<MachineDominatorTree>();
> >
> >     for
> (MachineLoopInfo::iterator
> >            I =
> LI->begin(), E = LI->end(); I != E; ++I) {
> >      CurLoop = *I;
> >    }
> > }
> > ******************************
> > I copy find from MachineLICM.cpp, and change class
> name.
> > What is different ??
> >
> > Thanks.
> >
> > Ren Kun
> >
> >
> >
> >
> > --- 10年1月26日,周二, Benoit
> Boissinot<bboissin+llvm at gmail.com> 写道:
> >
> >> 发件人: Benoit Boissinot<bboissin+llvm at gmail.com>
> >> 主题: Re: [LLVMdev] Find all backedges of CFG by
> MachineDominatorTree.  please look at my jpg.
> >> 收件人: "任坤"<hbrenkun at yahoo.cn>
> >> 抄送: "llvm"<llvmdev at cs.uiuc.edu>
> >> 日期: 2010年1月26日,周二,下午10:13
> >> On Tue, Jan 26, 2010 at 10:04:16PM
> >> +0800, 浠诲潳   wrote:
> >>> Hi, Dear Boissinot:
> >>>
> >>> 1. When I have irreducible CFG, I travel its
> nodes by
> >> DFS.
> >>>      search backedge for every
> node. After I
> >> finish one node,
> >>>      push it into a stack.
> >>>      [0, 1, 2, M]
> >> <---push.
> >>>      [0, 1, 2,
> M,...N]<---push.
> >>>
> >>>      When resolving node M,
> find a edge from
> >> node N to node M,
> >>>      N is not in
> stack(M<  N), It is a
> >> backedge.
> >>>      N is in stack(M> 
> N), It is NOT a
> >> backedge.
> >>>
> >>>      I treat these backedges as
> loop-edges. M
> >> is Loop header node.
> >>>      If I cut these edges from
> CFG, CFG can be
> >> topological sort.
> >>>
> >>>      Am I right???
> >>
> >> yes, exactly.
> >>
> >> regards,
> >>
> >> Benoit
> >>
> >> --
> >> :wq
> >>
> >
> >
> >
> >
> >
> >
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu 
>        http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 
>


      
-------------- next part --------------
A non-text attachment was scrubbed...
Name: dominatorTree.jpg
Type: image/jpeg
Size: 71233 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20100309/f9f17ce2/attachment.jpg>


More information about the llvm-dev mailing list