[LLVMdev] Spilling multi-word virtual registers

[Jakob Stoklund Olesen]

On Jul 21, 2010, at 7:44 AM, Ken Dyck wrote:
> Speaking of the rewriter, I've had some problems recently where the
> rewriter replaces the last of the three load instructions with a COPY
> instruction because isLoadFromStackSlot() returns the same frame index
> for all three load. For example,
> 
>  load a.l, <fi#n>, 0        load a.l, <fi#n>, 0
>  load a.h  <fi#n>, 1  ===>  load a.h, <fi#n>, 1
>  load a.e  <fi#n>, 3        move a.e, a.l
> 
> I quickly hacked around the problem by returning a frame index only for
> the loads of the low sub-register (returning 0 for the rest), but I'm
> sure this isn't the best solution. Is there a simple way to avoid the
> replacement while still reporting the actual frame index for all of the
> load instructions?

Yeah, the target hooks are not really prepared for dealing with subregisters, and the rewriter doesn't really expect multiple instructions to be inserted by the hooks.

To be safe, you should probably only return true from isLoadFromStackSlot when the instruction loads the whole stack slot. That is, the offset is zero, and the stack slot size matches the register size.

If you need the rewriter to be able to undo a stack slot load/store, you will have to create pseudo-instructions for accumulator loads and stores. Compare the ARMExpandPseudoInsts pass.

We are working towards a design where we don't need these rewriter shenanigans. In fact, the trivial rewriter will be used instead.

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