[LLVMdev] Spilling multi-word virtual registers

[Jakob Stoklund Olesen]

On Jul 20, 2010, at 10:57 AM, Ken Dyck wrote:

> Does anybody have any tips for generating spills/reloads for large
> non-vector registers?
> 
> I'm working on a back end for a DSP architecture that has accumulator
> registers that are too large to be spilled or reloaded with a single
> instruction. All of their bits can be accessed in word-size chunks via
> three sub-registers (low, high, and ext). So loading or storing one
> requires three instructions: one for each sub-register.
> 
> For quite a while now, my implementation of loadRegFromStackSlot() and
> storeRegToStackSlot() has assumed that it would only receive physical
> registers, which makes it fairly straight-forward. They generate three
> memory instructions, calling TargetRegisterInfo::getSubReg() to get the
> sub-register operand for each of them.
> 
> So it was a rude awakening when a test program resulted in a _virtual_
> register being passed into loadRegFromStackSlot() (via
> LiveIntervals::tryFoldMemoryOperand() if it matters). Obviously I need
> to make some changes. But what?

This is quite simple to handle. A register MachineOperand has a subreg field for this purpose. It is used to pick out subregisters of a virtual register.

For a physical register:

  MO.setReg(TRI.getSubReg(Reg, SubIdx));

For a virtual register:

  MO.setReg(Reg);
  MO.setSubReg(SubIdx);

If you are using BuildMI, the subreg is passed as the third argument to addReg().

The register allocator (rewriter to be exact) will clear the subreg field when substituting the allocated physical register.

Note that a physical register operand may not have a subreg. It must be 0.

/jakob