[LLVMdev] adding switches to llvm-ld to disable certain optimizations.

[Dan Gohman]

On Feb 10, 2010, at 8:57 AM, Sanjiv Gupta wrote:

> Chris Lattner wrote:
>> On Feb 9, 2010, at 7:39 PM, Sanjiv Gupta wrote:
>> 
>> 
>>> Hi,
>>> I need to add switches like -disable-mem2reg, disable-gvn to llvm-ld. 
>>> Currently CreateStandardLTOPasses takes in only DisableInternalize and 
>>> DisableInliner switches.
>>> 
>>> Is modifying this API okay for these new switches, or is it doable in 
>>> some other ways ?
>>> 
>> 
>> Why do you want this?
>> 
>> -Chris
>> 
> Mem2Reg isn't really useful for a single register machine as ours. More 
> often than not, it causes extra spilling.


Have you ever investigated the following approach?   Define fake
register+register forms of common instructions, in addition to the
register+memory forms. Let the instruction selector work as if
everything were in registers.  Then, since there's only one physical
register, the register allocator will have to spill, and the spills
and reloads can be folded in, eliminating the take register+register
forms. You might need special handling for the case where both
operands are the same.

If this works well enough, it would allow your target to be less
strange from LLVM's perspective. Fewer things would need to be
Custom-expanded (e.g. ADD), and it may even allow you to actually
run more of the optimizer (since without mem2reg, much of the
optimizer is effectively disabled).

Dan