[LLVMdev] Register Pairing

[Lang Hames]

Hi Borja,


> Without doing what i mentioned and letting LLVM expand all operations wider
> than 8 bits as you asked, the code produced is excellent supposing that many
> of the moves there should be 16 bit moves reducing code size and right
> register allocation, also something important for me is that the code is
> better than gcc's. When i say right reg allocation it doesnt mean it's doing
> things wrong, i mean it's getting regs freely without pairing regs because i
> dont know how to do it. So now i have to push things further and implement
> these details to make the backend introduce those 16 bit instructions i dont
> know how to insert, and this is where i need help.
>

I'm not sure how to help with inserting the 16-bit instructions, but if you
go with using allocating 8-bit virtuals the PBQP allocator can handle the
pairing constraint. An overview of how to use the allocator is given in
http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-September/034781.html , and
the follow up emails. If you think it might be useful and have any questions
I'd be happy to help.

Cheers,
Lang.
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20101202/ccc325d1/attachment.html>