[LLVMdev] [Query] Programming Register Allocation

[Jeff Kunkel]

I solve my own problem.

mbbi->getRegInfo()->getRegClass( reg )

will return the register class.

Thanks,
Jeff Kunkel

On Sun, Aug 29, 2010 at 11:43 AM, Jeff Kunkel <jdkunk3 at gmail.com> wrote:

> Thanks for the information.
>
> I still don't know how do I partition registers into different classes from
> the virtual registers? For instance, I have the function who which iterates
> over the instructions, but I don't know how to write the function which
> returns the different register class.
>
> void RAOptimal::Gather(MachineFunction &Fn) {
>     // Gather just iterates over the blocks, basicblocks, ect. until
>     // it finds the MachineOperand. When it finds the operand, it
>     // checks to see if the operand is a register, if so, it parses
>     // the register to find which set it is suppose to be in.
>
>     // time is an artificial time used to denote whether an operand came
>     // before or after another operand.
>     unsigned time;
>     time = 0; // Initialize time.
>
>     // For each block:
>     for( MachineFunction::iterator mfi=Fn.begin(), mfe=Fn.end(); mfi !=
> mfe; ++mfi ) {
>         // for each byte code line:
>         for( MachineBasicBlock::iterator mbbi = mfi->begin(), mbbe =
> mfi->end(); mbbi != mbbe; ++mbbi ) {
>             // for each variable used:
>             for( int opi=0, ope=mbbi->getNumOperands(); opi != ope; ++opi )
> {
>                 // Get the variable
>                 const MachineOperand mop = mbbi->getOperand( opi );
>                 // If it is a register, notify the class.
>                 if( mop.isReg() ) {
>                     // DEBUG( dbgs() << "Found the register " << mop );
>                     if( mop.isDef() || mop.isUse() ) {
>                         // The instruction has defined the register.
>                         // Or, the instruction uses the register.
>                         unsigned reg = mop.getReg();
> *                        unsigned set = who(Fn, mbbi, mop, reg);*
>                         RegisterSets[ set ].Notify( reg, time, mbbi );
>                         // Increment time after each Notify to keep the
> reg's times from
>                         // overlapping.
>                         ++time;
>                     } else {
>                         assert( 0 && "The register is always defining or
> used." );
>                     }
>                 }
>             }
>         }
>     }
> }
>
> Thanks,
> Jeff Kunkel
>
> On Sun, Aug 29, 2010 at 8:45 AM, Gergö Barany <gergo at complang.tuwien.ac.at
> > wrote:
>
>> On Sat, Aug 28, 2010 at 16:20:42 -0400, Jeff Kunkel wrote:
>> > What I need to know is how to access the machine register classes. Also,
>> I
>> > need to know which virtual register is to be mapped into each specific
>> > register class. I assume there is type information on the registers. I
>> need
>> > to know how to access it.
>>
>> MachineRegisterInfo::getRegClass will give you the TargetRegisterClass for
>> a
>> given virtual register. Each TargetRegisterClass has an "allocation order"
>> that enumerates all physical registers valid for that class.
>>
>> > And a afterthought, does LLVM place casts into
>> > different virtual registers, or do I need to include casting of floats
>> to
>> > integers or vice versa when I see ADD i32 float i32?
>>
>> The instruction selector creates all necessary conversion instructions.
>>
>> --
>> Gergö Barany, research assistant
>> gergo at complang.tuwien.ac.at
>> Institute of Computer Languages
>> http://www.complang.tuwien.ac.at/gergo/
>> Vienna University of Technology                         Tel:
>> +43-1-58801-58522
>> Argentinierstrasse 8/E185, 1040 Wien, Austria           Fax:
>> +43-1-58801-18598
>>
>
>
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