[LLVMdev] Upstream PTX backend that uses target independent code generator if possible

[David A. Greene]

"Villmow, Micah" <Micah.Villmow at amd.com> writes:

>> I've have been wanting to see predicates (vector and scalar) in the
>> LLVM IR for a long time.  Perhaps the PTX backend is an opportunity
>> to explore that.

> [Villmow, Micah] From looking at the llvmptxbackend, it does not fully
> support vector types.  This in my perspective is one of the greatest
> benefits of the backend code-generator, automatic support for vector
> types in LLVM-IR that are not natively supported by the target machine
> via vector splitting.

Actually, one doesn't really need vector types for PTX at the codegen
level unless one wants to make use of the 128-bit memory loads and
stores.  This is because the programming model at the asm level is
almost entirely scalar.  But we do certainly want masking capability on
scalar instructions.  If the backend doesn't have that it's going to
generate horribly performing code.

                              -Dave