[LLVMdev] whether these transformations are doable and how?

[Neal N. Wang]

It's a silly question. I rephrase it as  "is it possible to use different
instruction to def the same ssa variable?"

On Wed, Apr 14, 2010 at 5:45 PM, Neal N. Wang <neal.wang at gmail.com> wrote:

> Thanks for all the replies which are really helpful.
>
> one more question regarding transformation:
>
> 4.  Given an instruction  %x1 = I1,  can I replace the rhs "I1"  with  "I2"
> and get a new instruction %x1 = I2?   Alternatively, I can add a new
> instruction %x2 = I2, and replace all uses of %x1 with %x2, and then delete
> %x1 = I1, but it seems the former is simpler or faster if it's doable.
>
> Any suggestion?
> Neal
>
>
>
>
> On Mon, Apr 12, 2010 at 11:20 PM, Devang Patel <devang.patel at gmail.com>wrote:
>
>> > 3.  can I modify a function to take extra formal parameters? can I
>> update
>> > all calls of the original function to take extra actual paramters?  The
>> > function might be called across multiple modules.   It seems this has to
>> be
>> > done at both ModulePass and FunctionPass levels.
>> >
>>
>> Check out DeadArgumentElimination pass. It does opposite of what you
>> want, but you'll get an idea.
>>
>> -
>> Devang
>>
>
>
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