[LLVMdev] How to express physical register dependencies between instructions

Arnaud Allard de Grandmaison Arnaud.AllardDeGrandMaison at dibcom.com
Wed Sep 9 09:44:22 PDT 2009

I am wondering how to express physical register dependencies between
instructions, typically in the case for conditionnal branch, where an
instruction which sets the condition codes is followed by a conditionnal

Assuming CCFLAGS is defined in my registerInfo.td, and that I am using
llvm-2.5 release, it seems several items need to be set in the .td file :
1 - SDNPOptInFlag / SDNPOptOutFlag
2 - Defs = [CCFLAGS] / Uses = [CCFLAGS]
3 - (implicit CCFLAGS)
4 - explicit usage of CCFLAGS

As a new comer to LLVM, I am missing the druid's lore to pick up the mixture
of right items to have it work.

I am asking the question because in our case, I observe that the
pre-RA-scheduling pass moves an instruction which clobbers CCFLAGS in between
my 2 instructions (set ccflags / brcc). I found on bugzilla that only the
burr scheduler has been taught about physical register dependencies, so I
made sure this is the one I am using. I am currently using #1 + #2 + #3, and have not yet used option #4, but I can
see this is the one being used for the X86.  Is this the one I should be using ?

Thanks in advance for any suggestion or hint,
Arnaud de Grandmaison

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