[LLVMdev] loads from a null address and optimizations
eli.friedman at gmail.com
Sun Sep 6 15:32:28 PDT 2009
On Sun, Sep 6, 2009 at 3:19 PM, Kenneth Uildriks<kennethuil at gmail.com> wrote:
> It would be unfortunate in a way if "this instruction can trap and go
> there" is taken to mean "if this instruction has no effect other than
> a possible trap, the instruction and the trapping behavior *must* be
What exactly would the semantics be if the instruction *might* trap?
I somehow can't imagine it being useful.
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