[LLVMdev] TableGen question - how to split a 64bit operation to two 32bit

[Anton Korobeynikov]

Hello, Artur

> I'm working on my own backend for a custom CPU. I have defined paired
> registers for 64bit operations, however to set a 64bit paired register with
> 64bit immediate I have to set each register in that pair separately with the
> higher and the lower 32bits of the immediate.
> Could anyone give me an advice how to describe it in *InstructionInfo.td or
> point me to something similar in the LLVM source code? (I was looking for it
> but couldn't find it)
There are several possible ways of doing so. One is to work at
asmprinter level. Also, many processors have separate instructions to
set e.g. low and high 16 bits of the whole 32 bit register. You might
want to see, how the stuff is done there (you'll need a custom operand
matching function + transform). See, e.g. arm, systemz, powerpc
backends.

-- 
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University