[LLVMdev] New 8bit micro controller back-end

[Evan Cheng]

On Nov 24, 2009, at 8:30 AM, David Greene wrote:

> On Monday 23 November 2009 09:01, Anton Korobeynikov wrote:
>> Hello
>> 
>>> It is a RISC with around 60 instructions like a 80c51 instruction set
>>> (without mul/div) and with Direct or indirect memory acces.
>> 
>> My estimate is something like a man-week for a person, who knows what to do
>> :)
> 
> That's pretty optimistic, even for someone who knows what to do.
> 
> The learning curve for TableGen is quite steep.  I would budget at least a
> year for everything; learning TableGen, writing patterns, custom lowering,
> testing, etc.

1 year is an eternity in LLVM year. ARM target was up and functional in about 2 months of time.

Evan

> 
> And that's for a relatively simple, orthogonal ISA.
> 
> Of course this happens iteratively.  You learn a little TableGen (mostly by
> looking at existing backends and asking lots of questions), write a few 
> patterns, learn a little more and so on.
> 
>                                -Dave
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