[LLVMdev] Pat<> & tlbgen

Chris Lattner clattner at apple.com
Wed Nov 4 15:13:23 PST 2009


On Nov 3, 2009, at 3:47 PM, David Greene wrote:

> Can someone explain the magic behind the Pat<> construct and tblgen.
>
>> From X86InstrSSE.td:
>
> def : Pat<(v4f32 (vector_shuffle VR128:$src, (undef),  
> MOVDDUP_shuffle_mask)),
>          (MOVLHPSrr VR128:$src, VR128:$src)>, Requires<[HasSSE1]>;
>
> Where's the code in tblgen to emit the matching code for this?  I'm  
> trying to
> extend it so that Pat<> can be used as a general subclass for AVX:

Hi David,

The secret here is that the 'pattern in instruction' syntax is just  
shorthand for a pat pattern, and tblgen internally converts all  
instructions into Pat pattern form.  The only code to match patters  
handles the Pat syntax.

> class Base<dag pat, dag result, ...> : Pat<dag, result> ...;
>
> multiclass foo<dag pat, dag result, ...> {
>  def A : Base<pat, result, ...>;
>  def B : Base<pat, result, ...>;
> }

I think this would just work if you end up with something like this:

> multiclass foo<dag pat, dag result, ...> {
>  def A : Pat<result, ...>;
>  def B : Pat<result, ...>;
> }

If the defs end up deriving from Pat, they should be automatically  
picked up by the existing code.

-Chris




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