[LLVMdev] RFC: Code Gen Change!
Bill Wendling
isanbard at gmail.com
Tue May 12 17:46:17 PDT 2009
I just finished coding up a change to how code generation builds
machine instructions. The change is in
include/llvm/CodeGen/MachineInstrBuilder.h, where when you want to add
a register, you have to specify a long list of booleans indicating if
it's defined, implicit, killed, dead, or early clobbered. I don't know
about you, but it was hard for me to read the source and understand
what was going on without looking at the header file. So, I made these
changes.
Instead of all of the booleans, you pass in a flag that has bits set
to indicate what state the register is in:
namespace RegState {
enum {
Define = 0x1,
Implicit = 0x2,
Kill = 0x4,
Dead = 0x8,
EarlyClobber = 0x10,
ImplicitDefine = Implicit | Define,
ImplicitKill = Implicit | Kill
};
}
class MachineInstrBuilder {
MachineInstr *MI;
public:
explicit MachineInstrBuilder(MachineInstr *mi) : MI(mi) {}
/// addReg - Add a new virtual register operand...
///
const
MachineInstrBuilder &addReg(unsigned RegNo, unsigned flags = 0,
unsigned SubReg = 0) const {
MI->addOperand(MachineOperand::CreateReg(RegNo,
flags & RegState::Define,
flags & RegState::Implicit,
flags & RegState::Kill,
flags & RegState::Dead,
SubReg,
flags & RegState::EarlyClobber));
return *this;
}
To use this, you would do something like:
BuildMI(...).addReg(Reg, RegState::Kill);
etc.
In a lot of cases, an explicit true/false isn't passed into the addReg
method. I added some helper functions to help make this less of a
pain:
inline unsigned getDefRegState(bool B) {
return B ? RegState::Define : 0;
}
inline unsigned getImplRegState(bool B) {
return B ? RegState::Implicit : 0;
}
inline unsigned getKillRegState(bool B) {
return B ? RegState::Kill : 0;
}
inline unsigned getDeadRegState(bool B) {
return B ? RegState::Dead : 0;
}
So you can use them like this:
BuildMI(...).addReg(Reg, getKillRegState(isKill);
My hope is that this is a cleaner way of building these machine instructions.
Comments and suggestions are welcome.
-bw
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